rbxii3/firmware
1
0
Fork 0
mirror of https://github.com/meshtastic/firmware.git synced 2025-12-22 02:32:23 +00:00
Code Issues Packages Projects Releases Wiki Activity

Install a hardfault handler on NRF52

Browse Source
This commit is contained in:
geeksville
2020-07-15 13:24:57 -07:00
parent 4147786b12
commit f919eb6a64
3 changed files with 36 additions and 81 deletions
Download Patch File Download Diff File Expand all files Collapse all files

52
src/nrf52/hardfault.cpp
View File

@@ -5,47 +5,51 @@
enum { r0, r1, r2, r3, r12, lr, pc, psr };
// we can't use the regular DEBUG_MSG for these crash dumps because it depends on threading still being running. Instead use the
// segger in memory tool
#define FAULT_MSG(...) SEGGER_MSG(__VA_ARGS__)
// Per http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/Cihcfefj.html
static void printUsageErrorMsg(uint32_t cfsr)
{
DEBUG_MSG("Usage fault: ");
FAULT_MSG("Usage fault: ");
cfsr >>= SCB_CFSR_USGFAULTSR_Pos; // right shift to lsb
if ((cfsr & (1 << 9)) != 0)
DEBUG_MSG("Divide by zero\n");
FAULT_MSG("Divide by zero\n");
if ((cfsr & (1 << 8)) != 0)
DEBUG_MSG("Unaligned\n");
FAULT_MSG("Unaligned\n");
}
static void printBusErrorMsg(uint32_t cfsr)
{
DEBUG_MSG("Usage fault: ");
FAULT_MSG("Bus fault: ");
cfsr >>= SCB_CFSR_BUSFAULTSR_Pos; // right shift to lsb
if ((cfsr & (1 << 0)) != 0)
DEBUG_MSG("Instruction bus error\n");
FAULT_MSG("Instruction bus error\n");
if ((cfsr & (1 << 1)) != 0)
DEBUG_MSG("Precise data bus error\n");
FAULT_MSG("Precise data bus error\n");
if ((cfsr & (1 << 2)) != 0)
DEBUG_MSG("Imprecise data bus error\n");
FAULT_MSG("Imprecise data bus error\n");
}
static void printMemErrorMsg(uint32_t cfsr)
{
DEBUG_MSG("Usage fault: ");
FAULT_MSG("Memory fault: ");
cfsr >>= SCB_CFSR_MEMFAULTSR_Pos; // right shift to lsb
if ((cfsr & (1 << 0)) != 0)
DEBUG_MSG("Instruction access violation\n");
FAULT_MSG("Instruction access violation\n");
if ((cfsr & (1 << 1)) != 0)
DEBUG_MSG("Data access violation\n");
FAULT_MSG("Data access violation\n");
}
static void HardFault_Impl(uint32_t stack[])
extern "C" void HardFault_Impl(uint32_t stack[])
{
DEBUG_MSG("In Hard Fault Handler\n");
DEBUG_MSG("SCB->HFSR = 0x%08lx\n", SCB->HFSR);
FAULT_MSG("In Hard Fault Handler\n");
FAULT_MSG("SCB->HFSR = 0x%08lx\n", SCB->HFSR);
if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
DEBUG_MSG("Forced Hard Fault\n");
DEBUG_MSG("SCB->CFSR = 0x%08lx\n", SCB->CFSR);
FAULT_MSG("Forced Hard Fault\n");
FAULT_MSG("SCB->CFSR = 0x%08lx\n", SCB->CFSR);
if ((SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk) != 0) {
printUsageErrorMsg(SCB->CFSR);
@@ -57,21 +61,21 @@ static void HardFault_Impl(uint32_t stack[])
printMemErrorMsg(SCB->CFSR);
}
DEBUG_MSG("r0 = 0x%08lx\n", stack[r0]);
DEBUG_MSG("r1 = 0x%08lx\n", stack[r1]);
DEBUG_MSG("r2 = 0x%08lx\n", stack[r2]);
DEBUG_MSG("r3 = 0x%08lx\n", stack[r3]);
DEBUG_MSG("r12 = 0x%08lx\n", stack[r12]);
DEBUG_MSG("lr = 0x%08lx\n", stack[lr]);
DEBUG_MSG("pc = 0x%08lx\n", stack[pc]);
DEBUG_MSG("psr = 0x%08lx\n", stack[psr]);
FAULT_MSG("r0 = 0x%08lx\n", stack[r0]);
FAULT_MSG("r1 = 0x%08lx\n", stack[r1]);
FAULT_MSG("r2 = 0x%08lx\n", stack[r2]);
FAULT_MSG("r3 = 0x%08lx\n", stack[r3]);
FAULT_MSG("r12 = 0x%08lx\n", stack[r12]);
FAULT_MSG("lr = 0x%08lx\n", stack[lr]);
FAULT_MSG("pc = 0x%08lx\n", stack[pc]);
FAULT_MSG("psr = 0x%08lx\n", stack[psr]);
asm volatile("bkpt #01");
while (1)
;
}
}
void HardFault_Handler(void)
extern "C" void HardFault_Handler(void)
{
asm volatile(" mrs r0,msp\n"
" b HardFault_Impl \n");