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nRF52840: Migrate variants to new structure (#7396)
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108
variants/nrf52840/seeed_solar_node/variant.cpp
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108
variants/nrf52840/seeed_solar_node/variant.cpp
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/*
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* variant.cpp - Digital pin mapping for nRF52-based development board
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*
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* This file defines the pin mapping array that maps logical digital pins (D0-D17)
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* to physical GPIO ports/pins on the Nordic nRF52 series microcontroller.
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*
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* Board: [Seeed Studio XIAO nRF52840 Sense (Seeed Solar Node)]
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* Hardware Features:
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* - LoRa module (CS/SCK/MISO/MOSI control pins)
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* - GNSS module (TX/RX/Reset/Wakeup)
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* - User LEDs (D11-D12)
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* - User button (D13)
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* - Grove/NFC interface (D14-D15)
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* - Battery voltage monitoring (D16)
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*
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* Created [20250225]
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* By [Dylan]
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* Version 1.0
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* License: [MIT]
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*/
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#include "variant.h"
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#include "nrf.h"
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#include "wiring_constants.h"
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#include "wiring_digital.h"
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/**
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* @brief Digital pin to GPIO port/pin mapping table
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*
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* Format: Logical Pin (Dx) -> nRF Port.Pin (Px.xx)
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*
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* Pin Groupings:
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* [D0-D10] - Peripheral control (LoRa, GNSS)
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* [D11-D12] - LED outputs
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* [D13] - User button
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* [D14-D15] - Grove/NFC interface
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* [D16] - Battery voltage ADC input
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* [D17] - GNSS module reset
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*/
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extern "C" {
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const uint32_t g_ADigitalPinMap[] = {
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// D0 .. D10 - Peripheral control pins
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2, // D0 P0.02 (A0) GNSS_WAKEUP
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3, // D1 P0.03 (A1) LORA_DIO1
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28, // D2 P0.28 (A2) LORA_RESET
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29, // D3 P0.29 (A3) LORA_BUSY
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4, // D4 P0.04 (A4/SDA) LORA_CS
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5, // D5 P0.05 (A5/SCL) LORA_SW
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43, // D6 P1.11 (UART_TX) GNSS_TX
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44, // D7 P1.12 (UART_RX) GNSS_RX
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45, // D8 P1.13 (SPI_SCK) LORA_SCK
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46, // D9 P1.14 (SPI_MISO) LORA_MISO
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47, // D10 P1.15 (SPI_MOSI) LORA_MOSI
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// D11-D12 - LED outputs
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15, // D11 P0.15 User LED
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19, // D12 P0.19 Breathing LED
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// D13 - User input
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33, // D13 P1.01 User Button
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// D14-D15 - Grove/NFC interface
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9, // D14 P0.09 NFC1/GROVE_D1
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10, // D15 P0.10 NFC2/GROVE_D0
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// D16 - Power management
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// 31, // D16 P0.31 VBAT_ADC (Battery voltage)
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31, // D16 P0.31 VBAT_ADC (Battery voltage)
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// D17 - GNSS control
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35, // D17 P1.03 GNSS_RESET
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37, // D18 P1.05 GNSS_ENABLE
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14, // D19 P0.14 BAT_READ
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39, // D20 P1.07 USER_BUTTON
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//
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21, // D21 P0.21 (QSPI_SCK)
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25, // D22 P0.25 (QSPI_CSN)
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20, // D23 P0.20 (QSPI_SIO_0 DI)
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24, // D24 P0.24 (QSPI_SIO_1 DO)
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22, // D25 P0.22 (QSPI_SIO_2 WP)
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23, // D26 P0.23 (QSPI_SIO_3 HOLD)
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};
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}
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void initVariant()
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{
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pinMode(PIN_QSPI_CS, OUTPUT);
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digitalWrite(PIN_QSPI_CS, HIGH);
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// This setup is crucial for ensuring low power consumption and proper initialization of the hardware components.
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pinMode(GPS_EN, OUTPUT);
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digitalWrite(GPS_EN, LOW);
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// VBAT_ENABLE
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pinMode(BAT_READ, OUTPUT);
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digitalWrite(BAT_READ, LOW);
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pinMode(PIN_LED1, OUTPUT);
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digitalWrite(PIN_LED1, LOW);
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pinMode(PIN_LED2, OUTPUT);
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digitalWrite(PIN_LED2, LOW);
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pinMode(PIN_LED2, OUTPUT);
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// digitalWrite(LED_PIN, LOW);
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pinMode(GPS_EN, OUTPUT);
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digitalWrite(GPS_EN, HIGH);
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}
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